RTL Design Practice Guide I - Sequential Logic - D flip-flop
2.2 Flip-Flops 2.2.1 D Flip-Flop A D flip-flop, also known as data flip-flop or delay flip-flop, is a fundamental building block in digital logic design. It is a sequential logic device that stores and transfers a single data bit. The D flip-flop is widely used in various digital systems, including microprocessors, memories, and communication circuits. The D flip-flop consists of a data input (D), a clock input (CLK), and an output (Q). The data input (D) represents the bit of information that we want to store or transfer. The clock input (CLK) serves as a control signal to synchronize the operation of the flip-flop. When a rising or falling edge of the clock signal occurs, the value present at the input is captured and stored. The behaviour of a D flip-flop can be summarized as follows: When the clock signal transitions, the stored value at the data input (D) is transferred to the output (Q) of the flip-flop. This transfer happens instantly, making the output reflect the val